Integrated multi-domain modeling and simulation of complex 3D micro- and nanostructures
Conference: Smart Systems Integration 2008 - 2nd European Conference & Exhibition on Integration Issues of Miniaturized Systems - MOMS, MOEMS, ICS and Electronic Components
04/09/2008 - 04/10/2008 at Barcelona, Spain
Proceedings: Smart Systems Integration 2008
Pages: 4Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Bieniek, T.; Janczyk, G.; Janus, P.; Kociubinski, A.; Grabiec, P.; Szynka, J. (Institute of Electron Technology, Al. Lotników 32/46, Warsaw, Poland)
There is a big demand for stand-alone, multifunctional devices on the market of automotive, aerospace, biomedical or other applications. Therefore, there are many efforts to integrate their characteristic functionalities into one chip. As the power supply, power management, energy recuperation, RF communication, digital signal processing, memory, MEMS modules etc. are available and optimized in various fabrication technologies, the idea is to vertically integrate several dedicated IC-wafers. The simulations of the stand-alone modules functionality are insufficient to assure that the modules will work when assembled into a stacked device. Therefore, during the microstructures simulations it is necessary to take into consideration the interactions between the stacked modules. For integrated micro- and nanostructures the coupling between thermal, electrical and mechanical phenomena is a crucial issue. A temperature distribution due to Joule heating, combined with different thermal expansion coefficients of each layer, influences the mechanical and electrical parameters of the structure. Modeling of the coupled fields allows for analysis of most parameters of the microstructure (deflection, resistance changes etc.) and their dependence on temperature. Such results give crucial information to the designer about many aspects of the microsystem. At this stage of the design the technological sequence as well as materials used can be virtually verified and tested. In this paper we present the selected simulations results of the 3D models of the vertically integrated silicon dies. The detailed analysis of the specified chip interconnects based on the Cea-LETI microinsert technology are also included.