Intelligent silicon substrates for a shorter microsystem design cycle
Conference: Smart Systems Integration 2008 - 2nd European Conference & Exhibition on Integration Issues of Miniaturized Systems - MOMS, MOEMS, ICS and Electronic Components
04/09/2008 - 04/10/2008 at Barcelona, Spain
Proceedings: Smart Systems Integration 2008
Pages: 3Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Karttunen, Jani; Mäkinen, Jari; Tilli, Markku (Okmetic Oyj, Vantaa, Finland)
In order to succeed in consumer markets microsystems have to achieve a very low cost level. This forces device manufacturers to minimize device sizes and make design cycles shorter. The same trend also can be seen in automotive products although high reliability needs and harsh environments set some extra limitations. A silicon wafer manufacturer can help in this by developing more intelligent substrates for customer needs. Possibilities for adding new cost-saving features into silicon wafers designed for microsystem fabrication have been developed. SOI wafers with sealed cavities and gettering of metal impurities in SOI wafers, are given as examples.