Fast and Accurate Software Performance Estimation during High-Level Embedded System Design
Conference: edaWorkshop 08 - Workshop 2008 Electronic Design Automation (EDA)
05/06/2008 - 05/07/2008 at Hannover, Germany
Proceedings: edaWorkshop 08
Pages: 6Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Wang, Zhonglei; Sanchez, Antonio; Herkersdorf, Andreas; Stechele, Walter (Lehrstuhl für Integrierte Systeme, Technische Universität München, Arcisstraße 21, 80290 München, Germany)
Recently, software performance estimation based on source code instrumentation shows promising results in the literature. It achieves significant speedup without compromising accuracy, compared with cycle-accurate simulations. However, much work still remains to be done to make this technique flexible and accurate enough to estimate arbitrary applications on complex processors. To the best of our knowledge, we are the first to propose ways to tackle microarchitecture-related issues in the source code instrumentation approach. We perform static instruction scheduling for superscalar architectures at instrumentation time and propose combined execution of instrumented code and processor component simulators to model runtime interactions between software and microarchitecture. We have developed a new framework, SciSim, to provide a common infrastructure for the proposed approach. It is designed to be easily extendable and retargetable to different instruction set architectures and processors. Experiments with standard benchmarks are presented to validate our approach.