Logic Self Repair Based on Regular Building Blocks
Conference: ARCS 2009 - 22th International Conference on Architecture of Computing Systems
03/11/2009 at Delft, The Netherlands
Proceedings: ARCS 2009
Pages: 6Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Koal, Tobias; Vierhaus, Heinrich T. (Brandenburg University of Technology Cottbus, Department of Computer Science)
The scalability of CMOS technology is apparently approaching physical limits. In particular, technology forecasts expect higher rates of permanent and transient faults, which make fault tolerant design and, eventually, built-in self repair (BISR) capabilities a necessity. While BISR works reasonably in regular structures such as memory blocks, BISR for random logic is by far an unsolved problem. This paper introduces a novel systematic approach towards logic BISR and gives some indications for cost and limitations.