Routability Prediction for Three-Dimensional Circuits
Conference: edaWorkshop 10 - Workshop 2010 - Electronic Design Automation (EDA)
05/04/2010 - 05/05/2010 at Hannover, Germany
Proceedings: edaWorkshop 10
Pages: 6Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Meister, Tilo; Lienig, Jens (Dresden University of Technology, Faculty of Electrical Engineering and Information Technology, Institute of Electromechanical and Electronic Design, Dresden, Germany)
Layout synthesis requires the repeated evaluation of interim solutions. Routability is a common and important criterion in order to identify results that are most promising for subsequent synthesis steps. Recent advances in 3D integration technologies such as 3D integrated circuits (3D ICs) have been complicating routability prediction tremendously. Hence, new approaches that enable a quick evaluation of routability in 3D interconnect topologies are required. In this paper, we first give an overview of methods of routability prediction. These methods are systematically arranged by their resolution and accuracy. Next, we investigate challenges of predicting routability for 3D ICs. Subsequently, an effective method to extend conventional approaches of routability prediction to the requirements of 3D interconnect is presented.