Shared-memory communication in distributed SoCs on multi-FPGA systems
Conference: edaWorkshop 11 - Proceedings
05/10/2011 - 05/12/2011 at Dresden, Germany
Proceedings: edaWorkshop 11
Pages: 6Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Müller, Marcus; Brandel, Oliver; Krahn, Alexander; Fengler, Wolfgang (Computer Architecture and Embedded Systems Group, Ilmenau University of Technology, Ilmenau, Germany)
In the field of high-precision measurement and control systems distributed multi-processor systems-on-chip on interconnected FPGA assemblies are a platform choice with the potential to achieve the required embedded real-time application performance. While there are multiple established on-chip system standards available, the off-chip communication is often subject to custom development. This paper introduces an interface component, which establishes a distributed shared memory with a unified global address space to abstract from an underlying physical bus topology. The shared memory implementation structure as part of a SoC design is introduced and the achievable performance on an experimental multi-FPGA platform is analysed.