Board implementation and its performance for IR-UWB IEEE.802.15.4a from multiple ASIC chips

Conference: European Wireless 2012 - 18th European Wireless Conference 2012
04/18/2012 - 04/20/2012 at Poznan, Poland

Proceedings: European Wireless 2012

Pages: 8Language: englishTyp: PDF

Olonbayar, S.; Kreiser, D.; Martynenko, D.; Fischer, G.; Klymenko, O.; Kraemer, R. (IHP, Im Technologiepark 25, 15236 Frankfurt/Oder, Germany)

One energy efficient way of ASIC implementation for the standard IEEE802.15.4a was considered in greater detail. The main focus was on developing a solution for short range communication based on impulse radio ultra wideband. The ASIC implementation is performed with the 250 nm SiGe technology from IHP, Germany. The current system consists of three chips: radio frequency frontend, digital baseband and an integrating analogue digital converter. All the chips were fabricated and designed at IHP. A non-coherent energy detection receiver was realised which collects energy over 16 ns in analogue fashion. The performance of the complete system was evaluated bringing the chips on a board. Our multiple ASIC approach was a necessary step towards a complete integration of the system into a single chip. This paper discusses the function of individual chips and their interaction on a board. The performance was assessed by frame error rates, approximate coverage and waveforms at certain points. Initial laboratory tests and measurements suggest that the implemented system can support wireless communications in a distance of up to five meters and consume reasonable power.