Maximum power limit for withstand insulation capability of IGBT/MOSFET gate drivers
Conference: PCIM Europe 2014 - International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management
05/20/2014 - 05/22/2014 at Nürnberg, Deutschland
Proceedings: PCIM Europe 2014
Pages: 7Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Strzalkowski, Bernhard (Analog Devices, Wilhelm-Wagenfeldstr. 80807 Munich, Germany)
The power density of modern power inverter rises continuously. This is due to constantly increasing performances of MOSFETs and IGBTs as well as of the gate drivers. One unpredictable system fault can cause damage or explosion of power switches or even whole inverter. On the other hand, new high performance gate drivers exhibit excellent propagation delay, high bandwidth, overcurrent protection and high integration level. Those drivers provide a small form factor because the electrical isolation is already integrated on the driver chip. This electrical isolation can be performed by means of integrated high voltage microtransformers or capacitors. Therefore, for high power density inverters, the gate driver isolation safety performance needs to be investigated and validated. The isolation reliability must be analyzed in the worst case, when power-switches destruct. This paper investigates the gate driver’s isolation behavior by intentional destruction of IGBT/MOSFET power switches.