Recent Progress of 650V Cascode GaN Technology

Abstract:
We report recent advances in three critical areas of our 650V cascode GaN technology development at ON Semiconductor: demonstrated stable high temperature dynamic Rdson and related circuit application ruggedness, UIS capability, and high temperature reverse bias (HTRB) reliability tests. Many prior publications have focused on GaN dynamic Rdson issues at room temperature, even though GaN power devices have tremendous advantages over Si when serving at high temperatures. In addition, we show that room temperature stable dynamic Rdson behavior does not guarantees device reliability, it is the stable high temperature dynamic Rdson that determines the ruggedness of the GaN power devices. With our proprietary and innovative designs and optimizations of epitaxial and device structures, we show a completely different dynamic Rdson behavior in contrast to the common trend reported in literature: a negative dynamic Rdson trend. We demonstrate robust performance and reliability of our new cascode GaN power devices in PFC tests conducted at both room and high temperatures, at high powers, at high frequency conditions, and in a Totem-Pole circuit. A physical model to explain the observed dynamic Rdson behaviors will be speculated in terms of trapping, de-trapping, and back-gating effects. One of the critical disadvantages of GaN power devices compared to Si counterpart is its lack of UIS capabilities and this has not received the proper attention it deserves. We will show the intrinsic UIS capability of cascode GaN devices is low and mainly due to capacitive charging. Although we have tested our 650V GaN power devices in various harsh conditioned PFC circuits without any issues, we would like to provide our customers with the comparable UIS capability to Si counterpart devices. We report a dramatic improvement of our cascode GaN devices at the system level in UIS capability comparable with Si counterparts, while such an improvement does not scarify efficiency. GaN-specific HTRB tests are performed as partial qualification requirements at 520V/150C for our 650V-rated cascode GaN power devices. Dynamic Rdson, leakage currents, and other parametrics are measured at both 150C and 25C at each read-out point toward 1000 hours, a read-out procedure that is different from traditional Si HTRB test as we focus on high temperature dynamic Rdson behavior. The preliminary HTRB data at 1008 hours indicate solid reliability in terms of stable high temperature dynamic Rdson as well as drain and gate leakage currents.