Towards a One Nano-Henry Power Module for SiC and GaN

Abstract:
Decreased commutation times, especially introducing SiC and GaN, require much reduced inductances inside power modules. This paper proposes an optimal geometry of strip line layout at every step of construction of the power module. For each commutation loop, return conductors are made of copper foils mounted face to face in front of chips boundings. Optimization includes reduction of length, increase of width of conductors, and decrease of insulation layer thickness. For a half bridge module including six paralleled MOS, inductance is estimated around only one Nano-Henry.