A Low Impedance Drive Circuit to Suppress the Spurious Turn-On in High Speed Wide Band-Gap Semiconductor Halfbridges

Abstract:
A gate drive circuit for gallium nitride (GaN) enhancement mode (e-mode) transistors is presented, which avoids parasitic turn-on of the power devices in the halfbridge configuration. New e-mode GaN devices turn on at very low threshold voltages between 1V and 2V. This makes the transistors highly sensitive to spurious turn-on and thus reduces the required safety margin of the gate drive signals. To avoid this parasitic turn-on, a very low gate loop impedance is required. This prevents the halfbridge against bridge shorts during the switching events and guarantees stable gate drive control with increased switching efficiency. The new gate drive circuit is developed in a SPICE simulation environment and verified in a prototype setup by a double pulse test. The simulation matches very well with the experimental result and demonstrates the suppression of parasitic semiconductor turn-on with the proposed gate drive. Furthermore the dissipated switching energy is reduced, compared to a standard gate drive circuit. High DCDC converter efficiency of 98.67% at 1kW output power is achieved by using the driving circuit for a buck converter prototype with 200kHz switching frequency.