On the way to a Third Generation Real-Time Cellular Neural Network Processor
Conference: CNNA 2016 - 15th International Workshop on Cellular Nanoscale Networks and their Applications
08/23/2016 - 08/25/2016 at Dresden, Deutschland
Proceedings: CNNA 2016
Pages: 2Language: englishTyp: PDF
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Authors:
Yildiz, Nerhun (Department of Electronics and Communication Engineering, Yildiz Technical University, Istanbul, Turkey & Department of Bioengineering, Imperial Collage London, London, UK)
Cesur, Evren (nesta Design Ltd., Yildiz Technical University TechnoPark, B2 Blok No:121, 34220 Istanbul, Turkey)
Tavsanoglu, Vedat (Department of Electrical and Electronics Engineering, Isik University, Istanbul, Turkey)
Abstract:
In this proceeding, the architecture of a third generation Real-Time Cellular Neural Network (CNN) Processor (RTCNNP-v3) is disclosed, which is a digital CNN emulator to be implemented on an FPGA device. The previous generation emulator, RTCNNP-v2, is the only CNN implementation reported to be capable of processing full-HD 1080p@60 (1080 x 1920 resolution at 60 Hz frame rate) video images in real-time. However, there are some weaknesses in both the design and implementation of RTCNNP-v2, like the inability to process different parts of the video images in parallel, lack of support for recording and recalling intermediate frames using external memory and it has some jitter issues at computation rates above 200 MHz. All of those issues are addressed in the next architecture of our CNN emulator, RTCNNP-v3, which is being implemented of an FPGA device.