DC behaviour of a non-volatile memristor: part II

Conference: CNNA 2016 - 15th International Workshop on Cellular Nanoscale Networks and their Applications
08/23/2016 - 08/25/2016 at Dresden, Deutschland

Proceedings: CNNA 2016

Pages: 2Language: englishTyp: PDF

Personal VDE Members are entitled to a 10% discount on this title

Ascoli, A.; Tetzlaff, R. (Institut fur Grundlagen der Elektrotechnik und Elektronik, TU Dresden, Dresden, Germany)
Chua, L. O. (Department of Electrical Engineering and Computer Sciences, University of California, Berkeley, Berkeley, CA 94720, USA)
Strachan, J. P.; Williams, R. S. (Hewlett Packard Labs, 3000 Hanover Street, Palo Alto, California 94304, USA)

Adopting the system theoretic tools introduced in part I, this paper gains a deep insight into the fading memory effects emerging in a non-volatile memristor under DC inputs. Experimental evidence for the history erase phenomenon is also provided here.