Reduction of Memristance Drift in Twin Memristor Crossbar
Conference: CNNA 2016 - 15th International Workshop on Cellular Nanoscale Networks and their Applications
08/23/2016 - 08/25/2016 at Dresden, Deutschland
Proceedings: CNNA 2016
Pages: 2Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Truong, Son Ngoc; Pham, Khoa Van; Yang, Wonsun; Min, Kyeong-Sik (School of Electrical Engineering, Kookmin University, Seoul 136-702, Korea)
One of the representative applications of neuromorphic circuits is pattern recognition, because biological memory such as human brain learns and recalls its contents by patterns. This aspect of brain memory is very different from the solid-state memory, where its contents are accessed by the external addresses. Memristor crossbar circuits have been known that they can process the patterns like brain’s memory with high-speed, low-power consumption, and possibility of a 3-dimensional array. One of memristor crossbar’s problems is memristance drift which may cause a time-varying effect in the recognition rate of memristor crossbar. In this paper, we compare the pattern recognition rate between the complementary and twin crossbar circuits in terms of the memristance drift. As a result, the recognition rate of the twin crossbar shows better than the complementary one. In the complementary crossbar, the recognition rate becomes degraded more than the twin one, because the drifted memristance values in two complementary arrays are additive each other. In addition, the optimum read voltage is found in this work for minimizing the time-varying effect of memristance drift.