A Compute Model for Generating High Performance Computing SoCs on Hybrid Systems with FPGAs

Abstract:
The design of complex systems on FPGAs can be challenging because of the semantic gap between development of highperformance IP blocks on programmable hardware and the construction of software for general purpose processors. We aim at closing this gap between software- and programmable hardware development. To deliver maximal flexibility and performance while simplifying the design process, we propose a unification of the dissimilar blocks of such hybrid systems. Targeting hybrid CPU-FPGA architectures in this manuscript we provide high-level support for combining and connecting high-performance IP blocks with soft-core processors and prefabricated Systems-on-Chip. Hardware structure and software design are both defined in a unified programming environment. A tool-chain automatically integrates soft-core code compilation, standardized connection of the involved components and custom embedded runtime support, minimizing the number of steps for system development. An important design objective is the simple extensibility for the definition of new IP blocks and the integration of new target hardware. In case studies with various challenges from the medical computing domain, ranging from real-time multi-core medical monitoring to high-performance signal processing, the practical value of our approach in creating high-performance embedded systems is demonstrated.