Performance and Freedom From Interference - a contradiction in embedded automotive multi-core applications?

Conference: ARCS 2017 - 30th International Conference on Architecture of Computing Systems
04/03/2017 - 04/06/2017 at Vienna, Austria

Proceedings: ARCS 2017

Pages: 9Language: englishTyp: PDF

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Authors:
Goebel, Andre; Mader, Ralph (Continental Automotive GmbH, P.O. Box 100943, 93009 Regensburg, Germany)
Tripon, Ovidiu (Continental Automotive Romania SRL, Strada Siemens 1, 300704 Timisoara, Romania)

Abstract:
The electrification of the power-train will increase the safety integrity levels for applications within this domain, as the dynamics of acceleration and the vehicle control increase with the usage of electrical motors especially when thinking of wheel hub motors. Other domains in the vehicle require as well as support of additional safety goals which will come up in the area of advanced driver systems or even autonomous driving. Multi-core micro-controllers for this future applications meanwhile offer a great variety of different hardware support to fulfill the FIT rates required by the ISO26262 standard for higher safety integrity levels like ASIL C and D. One important aspect of this ISO standard is the requirement for freedom from interference with respect to the execution of safety relevant software and the exchange of data from safe to non-safe software modules. This paper will focus on the different possibilities of protecting data access and elaborate on another important aspect in the power-train area, which is the runtime performance of the complete system. One of the most commonly used software architecture standard in the embedded automotive software domain is AUTOSAR, which offers as well support for safety aspects. As the different mechanisms for data protection require more or less CPU load from the system the use of a memory protection unit has to be carefully considered under this aspect. This paper gives an overview on how PowerSAR, the AUTOSAR solution of Continental powertrain, supports this kind of memory protection units. It shows the concepts applied in the basic software area as well as for the applicative software. Further it will show the impact on the CPU load for an example application with activated memory protection unit (MPU).