Experimental Study of the Factors Affecting on SiC MOSFET Switching Performance
Conference: PCIM Asia 2017 - International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management
06/27/2017 - 06/29/2017 at Shanghai, China
Proceedings: PCIM Asia 2017
Pages: 8Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Ke, Junji; Sun, Peng; Zhang, Xiwei; Zhao, Zhibin; Cui, Xiang (North China Electric Power University, China)
In order to evaluate switching characteristics of SiC MOSFET under high temperature and high switching speed, this paper presents systematically full-parameter analysis, such as gate bias voltage, gate resistance, parasitic inductance, parasitic capacitance and junction temperature, in terms of voltage overshoot, current overshoot and switching loss. A method of extracting parasitic inductance and capacitance is also introduced to evaluate the parasitic parameters level of experimental platform. Moreover, the function of switching delay time with junction temperature is derived and verified by experiment. All factors are independently investigated based on the variable control method. The experimental results show that gate loop parameters have double-edged effects on switching performance. The common source inductance has the most remarkable influence, then the drain inductance, and gate loop inductance except for common source inductance almost has no influence. Regarding to the impact of parasitic capacitance, gate-source and drain-source capacitance respectively influence the switching speed and turn-off voltage overshoot. However, turn-on current overshoot depends on capacitance of freewheeling diode and load inductor. In addition, the total switching loss almost keeps constant under different junction temperature. These meaningful conclusions could provide guidance for designing power circuit based on SiC MOSFET.