Using GCC Analysis Techniques to Enable Parallel Memory Accesses in HLS
Conference: FSP 2017 - Fourth International Workshop on FPGAs for Software Programmers
09/07/2017 at Ghent, Belgium
Pages: 8Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Rohde, Johanna; Hochberger, Christian (Computer Systems Group, Technische Universität Darmstadt, Germany)
High-Level synthesis typically tries to generate efficient hardware structures starting from procedural, imperative programming languages like C. Unfortunately, statements in these languages contain many explicit or intrinsic dependencies. These dependencies limit the amount of parallelism that can be used during hardware synthesis. One source of such dependencies are memory accesses through pointers or arrays. If we can manage to remove some of these dependencies during program analysis, better hardware might be generated. In this contribution, we show how far the analysis techniques that are already available in a modern compiler framework like the GCC can take us in this task. We show that for two prominent optimization goals, more than 90% of the dependencies can be removed.