Tunable Chaos in Memristor Circuits for Pattern Recognition Tasks
Conference: CNNA 2018 - The 16th International Workshop on Cellular Nanoscale Networks and their Applications
08/28/2018 - 08/30/2018 at Budapest, Hungary
Proceedings: CNNA 2018
Pages: 4Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Marrone, Francesco; Corinto, Fernando (Department of Electronics and Telecommunications, Politecnico di Torino, Turin, Italy)
The work focuses on pattern classification via analog systems that exploit tunable chaos in 3rd–order memristor–based Chua’s circuits obtained by replacing the nonlinear resistor with an ideal flux–controlled memristor. Recently, complex dynamics and synchronization phenomena have been investigated via manifolds which are positively invariant for the nonlinear dynamics. Moreover, on each manifold the network obeys a different reduced– order dynamics in the flux–charge domain. These basic properties imply that two main types of bifurcations can occur, i.e., standard bifurcations on a fixed invariant manifold induced by changing the circuit parameters and bifurcations due to the variation of initial conditions and invariant manifold, but for fixed circuit parameters. The latter bifurcation phenomena are referred to as bifurcations without parameters and can be also induced by suitable pulses to tune the dynamical attractors. The reduced dynamics on invariant manifolds, and their analytic expressions, are the key tools for a comprehensive analysis of synchronization phenomena in networks of memristor–based Chua’s circuits. Such complex phenomena are the chief properties to realize analog systems for pattern recognition.