A New Architecture for Emulating CNN with Template Learning on FPGA
Conference: CNNA 2018 - The 16th International Workshop on Cellular Nanoscale Networks and their Applications
08/28/2018 - 08/30/2018 at Budapest, Hungary
Proceedings: CNNA 2018
Pages: 4Language: englishTyp: PDFPersonal VDE Members are entitled to a 10% discount on this title
Koese, Erdem (Department of Electronics Engineering, Gebze Technical University, Gebze-Kocaeli, TR-41400, Turkey)
Yalcin, Muestak E. (Department of Electronics and Communication Engineering, Istanbul Technical University, Istanbul, TR-34469, Turkey)
Cellular Neural Network with time invariant weights is being used in computer vision applications. There are many ways to implement CNNs for real time image processing. VLSI and FPGA technologies are getting better day by day. In our study we improved our previous system-on-chip implementation of CNNs. Improved CNN system-on-chip processor is built on an improved CNN emulator design and a better processor core which performs a new template learning algorithm is shown. SoC is programmed to perform a sequential CNN operations on different input and state images with different templates which are now can be stored in DDR2 RAM. Upgraded system design allows that templates can be more dynamically updated by the new learning algoritm in run time. System is implemented on Spartan 6 FPGA and tests results are presented and compared.