Interaction of inverter performance and selection criteria for paralleled modules

Abstract:
This paper describes two approaches in order to quantify the quality of the parallelization of modules, which in turn affects inverter performance. The first approach is based on a design of experiments (DOE). By means of switching two modules in parallel with chips having deflected parameters, the most relevant module parameters have been identified with respect to current mismatch, the deviation of losses and compliance with the safe operating area. Furthermore, an analytical approach is described that enables transferring the results of the design of experiment to higher degrees of parallelization. The quality of parallelization is quantified by a figure of merit that has been introduced, which allows one to define a worst-case scenario. Finally, based on real data of XHP 3 half-bridge modules, the previously defined selection criteria have been verified by calculating the differences of switching losses for a range of sets of six modules.