An EMI performance improved stacked substrate packaging structure with ultra-low parasitics for SiC half-bridge power module
Conference: PCIM Europe 2019 - International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management
05/07/2019 - 05/09/2019 at Nürnberg, Deutschland
Proceedings: PCIM Europe 2019
Pages: 6Language: englishTyp: PDF
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Authors:
Xie, Yue; Huang, Zhizhao; Chen, Cai; Kang, Yong (Huazhong University of Science and Technology, China)
Abstract:
This paper presents a 1200V/24A SiC half-bridge power module with ultra-low parasitic capacitance and inductance for low CM EMI. This module is improved from a stacked substrate hybrid packaging structure by optimizing the copper pattern. The parasitic capacitance reduction methods and the trade-off optimization for geometrical parameters are given. The parasitic capacitance of the output node is reduced by 70% compared to the original module. The parasitic capacitance and inductance of the proposed module are 6.8pF and 5.5nH respectively. The EMI simulation shows the proposed module can reduce CM EMI by about 9 dB, while the EMI test result shows a maximum of 6 dB reduction.