On Solving Task Allocation and Schedule Generation for Time-Triggered LET Systems using Constraint Programming

Conference: ARCS Workshop 2019 - 32nd International Conference on Architecture of Computing Systems
05/20/2019 - 05/21/2019 at Copenhagen, Denmark

Proceedings: ARCS 2019

Pages: 8Language: englishTyp: PDF

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Authors:
Lalo, Erjola; Weber, Raphael; Sailer, Andreas (Vector Informatik GmbH, 93053 Regensburg, Germany)
Mottok, Juergen (Ostbayerische Technische Hochschule, 93053 Regensburg, Germany)
Siemers, Christian (Technische Universität Clausthal, 38678 Clausthal-Zellerfeld, Germany)

Abstract:
The amount of safety-critical embedded systems in automotive development is heavily growing. Ensuring their reliability not only increases the complexity of functions but also requires determinism at design and execution time, which is considerably challenging to fulfill and verify for multi-core processors. The Logical Execution Time (LET) is recently recognized in automotive industry as an approach for ensuring deterministic functional behavior. However, to decrease the manual design effort and time for deploying such complex systems to multi-core platforms and for ensuring their strict timing and safety requirements, automatic solutions are needed. This work presents a solution for allocating tasks to multi-core processors and generating a time-triggered schedule for embedded systems considering safety, timing, and LET semantics. The approach we propose solves both challenges by defining them as a Constraint Satisfaction Problem (CSP). To examine our CSP formulation, we use MiniZinc, which is a solver-independent constraint modeling language that can employ a variety of solvers. In a case study, we explore optimizations of an industrial system that are enabled by scheduling and task allocation design decisions. Further, the performance of the proposed solutions is evaluated based on large set of synthetically generated system models.