New HVIC circuit topology to improve FTB immunity with 650 V / 50 A IGBT IPM for Industrial Applications
Conference: PCIM Asia 2019 - International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management
06/26/2019 - 06/28/2019 at Shanghai, China
Proceedings: PCIM Asia 2019
Pages: 6Language: englishTyp: PDF
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Authors:
Ohashi, Hidetomo; Yamaji, Masaharu; Akahane, Masashi; Sumida, Hitoshi; Yamada, Tadanori; Kobayashi, Yasuyuki (Fuji Electric Co. Ltd., China)
Chen, Song (Fuji Electric (China) Co. Ltd., PRC)
Sato, Takahide (University of Yamanashi, Japan)
Abstract:
In this paper, a new circuit topology for high-voltage integrated circuits (HVIC) to improve fast transient burst (FTB) immunity is described. The concept of new circuit topology is detecting negative surge voltage, which disturbs the off-pulse signal from a level-up shifter for edgetriggered signal transmission, and generating an additional off-pulse signal at the end of the surge period. Adopting a 650V-class HVIC with the new circuit topology in a 650V/50A rated IGBT-IPM, the FTB immunity has been improved from ± 2 kV to ± 4 kV in inverter applications for 3-phase motor drives.