Turn-off switching loss analysis associated with channel path in Super Junction MOSFET

Conference: PCIM Asia 2020 - International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management
11/16/2020 - 11/18/2020 at Shanghai, China

Proceedings: PCIM Asia 2020

Pages: 4Language: englishTyp: PDF

Authors:
Lee, Geunhyoung; Kang, Soohyun; Kang, Youngjin; Jung, Junhee; Ko, MK (Super-Junction MOSFET Technology Development ON Semiconductor, Bucheon-si, Republic of Korea)

Abstract:
Power MOSFET switching speed is the dominant importance of total switching losses. Recently, fast switching devices are more required for high-end application such as server / telecom power application that require high efficiency and high power density. This paper presents a computational analysis of the turn-off switching behavior associated with the channel (ICH) and output capacitance current (ICoss) controlled by the parasitic capacitance in a Super Junction MOSFET. The study is performed by P-spice model and TCAD simulation that enable us to understand a physical insight into the behavior of the electrons during the turn-off switching transient. Based on this study, the fastest switching speed is obtained by optimization of the capacitance without a self-turn-on phenomenon which is adversely influenced on turn-off switching losses.