An overview in dynamic comparators optimization methods

Abstract:
This article presents a review of dynamic comparators. A comparator with a dynamic floating inverter amplifier (FIA) achieves the remarkable energy efficiency thanks to a floating reservoir capacitor. an improved binary phase detector (PD), a time-domain comparator makes a low-noise and low-offset design through applying two differential voltagecontrolled delay lines (VCDLs). An edge-pursuit comparator (EPC) eliminates unnecessary energy consumption per comparison based on oscillator collapse, which is an innovative design from previous work. The article covers the characteristic analysis, aiming at providing a useful principle to IC designers.