IISB2 Topology for 48 V to 1 V Point of Load Applications
Conference: PCIM Conference 2025 - International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management
05/06/2025 - 05/08/2025 at Nürnberg, Germany
doi:10.30420/566541078
Proceedings: PCIM Conference 2025
Pages: 6Language: englishTyp: PDF
Authors:
Zeltner, Stefan; Hager, Jan; Seliger, Bernd; Ayllon, Gerson; Haager, Daniel; Eckardt, Bernd
Abstract:
By using an integrated, galvanically isolated, separated buck/boost topology (short iisb2 topology) a high efficiency 48 V to 1 V Point of Load (PoL) unit is demonstrated. This paper describes why the proposed topology can be even useful in typical non-insulated DC/DC applications, like processor supplies by deducing the proposed topology from the well-known single stage hard-switched half-bridge with current doubler rectifier topology. Moreover, it will be shown why the special requirements for processor PoL applications can be easier fulfilled by the proposed topology.