Enhanced Full-Mode Modulation Scheme for Switching Oscillation Reduction in SiC 3L-ANPC Inverter
Conference: PCIM Conference 2025 - International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management
05/06/2025 - 05/08/2025 at Nürnberg, Germany
doi:10.30420/566541093
Proceedings: PCIM Conference 2025
Pages: Language: englishTyp: PDF
Personal VDE Members are entitled to a 10% discount on this title
Authors:
Gao, Hangxian; Kawashima, Tetsuya; Kamizuma, Hiroshi; Hirao, Takashi
Abstract:
This paper presents an enhanced full-mode modulation scheme with additional clamping device switching for Silicon Carbide (SiC) MOSFETs in three-level active neutral-point-clamped (3L-ANPC) inverters, aimed at mitigating switching oscillations. The conventional full-mode scheme with dual neutral paths typically results in high reverse surge voltages and gate voltage oscillations, particularly at high temperatures where body diodes are prone to becoming snappy. The enhanced scheme significantly reduces these oscillations, with high temperature double pulse tests showing 91% reduction in recovery surge voltage and a 28% decrease in switching losses under high current conditions, leading to improved power loss distribution across the inverter.