Comparative Analysis of Asymmetric Loop Compensation of PLL for Grid-Connected VSCs Under Weak Grid

Abstract:
Phase-locked loop (PLL)-synchronized voltage source converters (VSCs) are prone to instability in weak grid conditions due to adverse interactions between the control and the grid impedance. Conventional stability enhancement methods primarily mitigate this issue by compensating for the negative resistance in the qq-channel admittance. In contrast, this work demonstrates that stability can be also effectively improved by employing q-axis voltage to d-axis current compensation, which reshapes the cross-coupling characteristics of the dq-admittance while preserving the intrinsic properties of the qq-channel. The proposed approach is validated through theoretical analysis and experimental verification under extremely weak grid conditions.