10 MHz Accelerated Gate-Switching Stress Tests Utilizing In-Situ Degradation Monitoring for SiC MOSFETs

Abstract:
Silicon carbide MOSFETs can experience electrical parameter instability depending on the manufacturing process. Specifically, a drift in threshold voltage and an increase in on-resistance are observed during switched operation, primarily caused by traps within and near the gate oxide. To evaluate these parameter drifts over a 20-year lifetime in solar inverters and electric vehicle applications within a feasible timeframe, this paper examines the fundamental electrical and thermal limits of gate-switching stress tests and explores corresponding design optimizations. A practical approach is then presented to accelerate gateswitching stress to 10 MHz and beyond. Additionally, challenges related to in-situ measurements and the distinction between dynamic effects and long-term aging effects in threshold voltage measurements are addressed. Finally, long-term measurements for switching cycles beyond 10(exp12) are presented, incorporating in-situ monitoring of degradation-sensitive electrical parameters.