Power Loss Devices Stress Optimisation for Hybrid Si-SiC Switch Design Under High Current Load

Abstract:
This work explores a 150 A hybrid switch (HYS) solution combining SiC MOSFETs and Si IGBTs. Paralleling a lower-rated MOSFET with an IGBT reduces losses and costs, providing an efficient module design. The study assesses the switching and conduction performance of three HYS for MOSFET:IGBT current ratios: 1:1, 1:2, and 1:3 using simulation in LTspice. The energy loss per module and individual switch are compared with traditional MOSFET and IGBT solutions. The HYS 1:1 gets close to the purely MOSFET-based solution, while the HYS 1:2 and HYS 1:3 provide lower losses than IGBTs at lower currents and the capability of a full 150A load. The selection of appropriate time delays between IGBT and MOSFET gate signals shows minimal losses, while the other values can lead to a loss increase. This study also analyses the impact of parasitic inductance on switching losses and waveforms. It shows that higher inductance increases losses and voltage overshoot on the MOSFET, which can lead to EMI problems and device damage.