Enhancing Short-Circuit Protection in SiC MOSFET Module Using Vgs Clamping and Desaturation Detection

Abstract:
The development of SiC MOSFETs aims to reduce drain-source on-resistance (Rds,on) to minimize energy loss. Besides the drift zone resistance, also the channel resistance should be kept as low as possible, either by a high gate-source voltage (Vgs) or by a large channel width. However, a lower channel resistance increases short-circuit current (Isc), making short-circuit protection circuits essential. This paper investigates a short-circuit protection circuit for SiC MOSFET module that combines short-circuit desaturation detection and gate-source voltage clamping functions. The proposed approach not only detects short-circuit conditions and turn off module but also limits the Isc during the short-circuit period. The Vgs clamping mechanism is activated by a predefined voltage induced by the parasitic source inductance (Lss) between the power source terminal and signal source terminal (VLss) under the rate of change of the Isc (disc/dt). This mechanism effectively reduces the Isc value through the application of a lower clamped Vgs. The integration of these functions significantly enhances the short-circuit protection capability of SiC MOSFET modules, addressing the challenges posed by their reduced short-circuit withstand capacity.