Performance Evaluation of a Phase-Locked Loop using Variation-Aware Behavioral Models

Abstract:
This paper presents a scalable hierarchical methodology for propagating process variations from circuit-level simulations to system-level analysis using Variation-Aware Behavioral Models (VABMs). These models are constructed using adaptive behavioral blocks that capture parameter dependencies across mixed-signal subsystems with a focus on Phase-Locked Loops (PLLs). By explicitly preserving inter-block parameter correlations, this approach enhances the accuracy of performance modeling while maintaining computational efficiency. We validate the effectiveness of this framework on a PLL case study, demonstrating its capability to reflect circuit-level statistical behavior at the system level.