1
A Comparative Analysis of ARM and RISC-V ISAs for Deeply Embedded Systems
Authors:
Simson, Natalie; Tahigara, Ares; Ecker, Wolfgang
Conference:
MBMV 2024 - 27. Workshop
2
A Concise, Architecture-Focused ASIP Modeling Approach for Instruction Set Simulators
Authors:
Emrich, Karsten; Mueller-Gritschneder, Daniel; Schlichtmann, Ulf
Conference:
MBMV 2024 - 27. Workshop
3
A Configurable and Efficient Memory Hierarchy for Neural Network Hardware Accelerator
Authors:
Bause, Oliver; Palomero Bernardo, Paul; Bringmann, Oliver
Conference:
MBMV 2024 - 27. Workshop
4
A Model-Driven Architecture Approach to Efficient and Adaptable Software Code Generation
Authors:
Bhadra, Mayuri; Albert, Daniel; Yun, Ungsang; Kunzelmann, Robert; Sanchez Lopera, Daniela; Ecker, Wolfgang
Conference:
MBMV 2024 - 27. Workshop
5
A Rate-Parametric Dataflow Language for a Manual Controllable CGRA Compilation Flow
Authors:
Boeseler, Felix; Walter, Joerg
Conference:
MBMV 2024 - 27. Workshop
6
A Universal Specification Methodology for Quality Ensured, Highly Automated Generation of Design Models
Authors:
Kunzelmann, Robert; Baerens, Emil; Gerl, Daniel; Bhadra, Mayuri; Schwarz, Niklas; Ecker, Wolfgang
Conference:
MBMV 2024 - 27. Workshop
7
Analyzing Local RISC-V Interrupt Latencies with Virtual Prototyping
Authors:
Hauser, Robert; Steffen, Lukas; Gruetzmacher, Florian; Haubelt, Christian
Conference:
MBMV 2024 - 27. Workshop
8
Compiler-based Processor Network Generation for Neural Networks on FPGAs
Authors:
Plagwitz, Patrick; Hannig, Frank; Teich, Juergen; Keszocze, Oliver
Conference:
MBMV 2024 - 27. Workshop
9
Contract Machines: An Engineer-friendly Specification Language for Mode-Based Systems
Authors:
Bachmeier, Joshua; Weigl, Alexander; Beckert, Bernhard
Conference:
MBMV 2024 - 27. Workshop
10
Enabling Power-based Side-Channel Attack Simulation using Virtual Prototyping
Authors:
Appold, Christian; Hu, Yong; Villegas Castillo, Ernesto; Bluethgen, Hans-Martin; Leinmueller, Tim
Conference:
MBMV 2024 - 27. Workshop
11
Estimating the Execution Time of CNN Inference on GPUs
Authors:
Groth, Stefan; Schmid, Moritz; Teich, Juergen; Hannig, Frank
Conference:
MBMV 2024 - 27. Workshop
12
Everything you AlwaysWanted to Know About Generalization of Proof Obligations in Bit-Level PDR
Authors:
Seufert, Tobias; Winterer, Felix; Scholl, Christoph; Scheibler, Karsten; Paxian, Tobias; Becker, Bernd
Conference:
MBMV 2024 - 27. Workshop
13
Extending Clang/LLVM with Custom Instructions using TableGen – An Experience Report
Authors:
Schlamelcher, Jan; Goodfellow, Thomas; Kebianyor, Bewoayia; Gruettner, Kim
Conference:
MBMV 2024 - 27. Workshop
14
Formal Verification of Security Properties on RISC-V Processors
Authors:
Chuah, Czea Sie; Appold, Christian; Leinmueller, Tim
Conference:
MBMV 2024 - 27. Workshop
15
From Imperative Sequential Structured Text Models to Synchronous Quartz and Sequentially Constructive Models
Authors:
Werner, Marcel Christian; Schneider, Klaus
Conference:
MBMV 2024 - 27. Workshop
16
Heterogeneous Virtual Prototypes for Smart Sensor Development: Requirements and Impact
Authors:
Kuester, Alexandra; Dorsch, Rainer; Haubelt, Christian
Conference:
MBMV 2024 - 27. Workshop
17
Implementation of Different Communication Structures for a Rocket Chip Based RISC-V Grid of Processing Cells
Authors:
Luchterhandt, Lars; Nellius, Tom; Beck, Robert; Doemer, Rainer; Kneuper, Pascal; Mueller, Wofgang; Sadiye, Babak
Conference:
MBMV 2024 - 27. Workshop
18
Incremental Proofs for Bounded Model Checking
Authors:
Fazekas, Katalin; Pollitt, Florian; Fleury, Mathias; Biere, Armin
Conference:
MBMV 2024 - 27. Workshop
19
Leveraging Virtual Prototypes and Metamorphic Testing for Verification of Embedded Graphics Libraries
Authors:
Hazott, Christoph; Stoegmueller, Florian; Grosse, Daniel
Conference:
MBMV 2024 - 27. Workshop
20
Memory Footprint Reduction for Dataflow Process Networks using Virtual Channels
Authors:
Krebs, Florian; Schneider, Klaus
Conference:
MBMV 2024 - 27. Workshop