Combining MEMS with ASIC and raw wafer production

Conference: MikroSystemTechnik Kongress 2021 - Kongress
11/08/2021 - 11/10/2021 at Stuttgart-Ludwigsburg, Deutschland

Proceedings: MikroSystemTechnik Kongress 2021

Pages: 4Language: englishTyp: PDF

Authors:
Majoni, Stefan; Stahl, Heiko (Robert Bosch GmbH, Reutlingen, Germany)

Abstract:
This paper will describe different MEMS architectures, focusing on a trend towards combined MEMS with ASIC and specific raw wafer. This can be the building of MEMS structures into the ASIC or on top of the ASIC. Another option is the use of the ASIC as cap for the MEMS. This can result in cost- and size-reduction and reduced parasitics but has some drawbacks. A newer trend is cavity SOI wafer, CSOI, where the raw wafer itself contains buried cavities, which are dependent of the product design. This results in a mixed-mode operation of MEMS foundry service with raw wafer supply. Pro’s, Con’s and challenges will be described with regard to MEMS foundry service.