Methods for Post-CMOS Integration of Micro-Electronics and -Photonics

Abstract:
In recent years integrated photonics has developed into a diverse field with various development paths being explored, including processes utilizing established silicon technology [1] and III-V materials such as indium phosphide [2]. As the need for co-integration of electronic and photonic devices arises – such as for the electronic control of active photonic devices – the compatibility and scalability of these processes become crucial. Post-CMOS integration bridges this gap, allowing photonics to be directly deposited and fabricated on completed CMOS circuits. In this paper we present such post-CMOS compatible photonics, highlighting the key process of chemical-mechanical polishing (CMP), which is utilized to create even interfaces with precise thickness control for further integration, see Figure 1. We compare data obtained from atomic force microscopy (AFM) measurements of the waveguide layer’s surface before and after CMP, along with the attenuation achieved in each case. Furthermore, we present results from a preliminary test in which all layers found in a photonic layer stack have been deposited onto a CMOS wafer with diodes. The results show that by preparing a surface for active material integration the performance of our waveguides is preserved, and that after post-CMOS integrating photonics the underlying electronics continue to work properly.