Prestructured PEEK Substrates – New Degrees of Freedom for Sensor Applications

Abstract:
In the innovative field of microsystem technology, research into new coating systems is ongoing and structural resolution is steadily miniaturized. However, the manufacturing techniques are based on the same manufacturing steps for decades: a silicon wafer forms the basis on which microstructures are built using lithography, which are then functionalized e.g. by using PVD coating. Since the semiconducting properties of silicon are not required for many sensor applications, glass and ceramics have also found their way onto the market as alternative substrate materials. In this case, the sensor element is exclusively the metallic coating, which changes its electrical properties under the influence of the environment. The process chain for structuring remains the same for glass and ceramics as it is for silicon. The advantages of these materials lie in their insulating/dielectric properties and increased chemical resistance. In this paper, the possibilities of polyether ether ketone (PEEK) as another alternative substrate material, which Ensinger has introduced in the market in 2024, are demonstrated. In addition to PEEK’s even higher chemical resistance and good electrical insulation compared to the aforementioned substrate materials, it has another key advantage: as a thermoplastic it allows quick forming into various shapes using the process of injection molding. While this unusual process in the area of microtechnology has been published already in [1-6], this publication aims to demonstrate the new degrees of freedom. Since the substrate is molded and structured within seconds, the underlaying process chain allows extended sensor arrays or special geometries to be manufactured cost-effectively. Two novel sensor types for current and position measurement based on the anisotropic magnetoresistive (AMR) effect show how to make use of this benefit. With footprints in the range of 100 mm², both sensors would not be economically viable on silicon.