RISC-V Based System on Chip for Wearable Speckle Plethysmography

Conference: MikroSystemTechnik KONGRESS 2025 - Mikroelektronik/Mikrosystemtechnik und ihre Anwendungen – Nachhaltigkeit und Technologiesouveränität
10/27/2025 - 10/29/2025 at Duisburg, Germany

doi:10.30420/456614131

Proceedings: MikroSystemTechnik Kongress 2025

Pages: 3Language: englishTyp: PDF

Authors:
Nolting, Stephan; Rolfes, Carsten

Abstract:
This paper presents the ongoing research of the Eurostars project AMBULAS that aims to develop a portable device for everyday patient vital data monitoring based on speckle plethysmography (SPG). Experiments have shown that SPG provides higher accuracy even when the patient is moving then conventional PPG (Photo plethysmography). Speckle images are sampled by a customized sensor ASIC and processed by a subsequent FPGA to extract vital parameter such as pulse rate and blood pressure. The FPGA is used to prototype a RISC-V-based application-specific instruction-set processor (ASIP) including application-specific hardware accelerators (implemented as custom ISA extensions) and interfaces. The heart of the image sensor ASIC is a photodiode array providing 64x64 pixels of spatial resolution manufactured in 180nm CMOS technology. The processing system implements an application specific instruction-set processor based on a generic, area optimized RISC-V CPU that is responsible for computing the vital parameter extraction from the obtained speckle images. Small area and low power consumption are crucial in this application setup.