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E DIN EN IEC 63550-4 VDE 0884-3550-4:2026-05

Semiconductor devices – Neuromorphic devices

Part 4: Evaluation method of asymmetry in memristor devices

(IEC 47/2940/CDV:2025); German and English version prEN IEC 63550-4:2025
Class/Status: Draft, valid
Released: 2026 -05   Published: 2026-04 -03
VDE Art. No.: 1801056
End of objection deadline: 2026-06-03

Note: You can pre-order this document (delivery subject to availability). Valid from 2026-05-01.

This part of IEC 63550-4 specifies the test methods for evaluating the asymmetry of neuromorphic memristor devices. The test methods in this international standard also include test apparatus, terms, and definitions for evaluating the conductance update asymmetry in the neuromorphic memristor devices, including asymmetry, cycle-to-cycle variation of asymmetry and device-to-device variation of asymmetry. This document is applicable to neuromorphic two-teminal memristor devices without any limitations prone to device technology and size.