Cover IEC 63011-3:2018
größer

IEC 63011-3:2018

Integrated circuits - Three dimensional integrated circuits - Part 3: Model and measurement conditions of through-silicon via

Ausgabedatum: 2018-11
Edition: 1.0
Sprache: EN-FR - zweisprachig englisch/französisch
Seitenzahl: 28 VDE-Artnr.: 226109

Inhaltsverzeichnis

IEC 63011-3:2018 specifies a reference model of through-silicon via (TSV) electrical characteristics required for an interface design in three dimensional integrated circuit (3-D IC) to transmit and receive digital data and measurement conditions for resistance and capacitance to specify TSV characteristics in 3-D IC.
Power devices, RF devices and micro-electromechanical systems (MEMS) are not in the scope of this document.