High Speed, Low Latency I/O Driver

Konferenz: ANALOG '06 - 9. ITG/GMM-Fachtagung
27.09.2006 - 29.09.2006 in Dresden, Germany

Tagungsband: ANALOG '06

Seiten: 5Sprache: EnglischTyp: PDF

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Fimmel, Dirk (AMD Saxony, Dresden)

In this paper we present an output driver that supports I/O voltages up to two times higher than the core voltage. The design is based on a voltage boosting level shifter allowing high frequency signals and providing a low latency output path. It is shown that the design is reliable with respect to the gate oxide stress both in operational mode and in different power up scenarios.