Performance Trends and Limitations of Power Electronic Systems
Konferenz: CIPS 2010 - 6th International Conference on Integrated Power Electronics Systems
16.03.2010 - 18.03.2010 in Nuremberg, Germany
Tagungsband: CIPS 2010
Seiten: 20Sprache: EnglischTyp: PDFPersönliche VDE-Mitglieder erhalten auf diesen Artikel 10% Rabatt
Kolar, J. W.; Biela, J.; Waffler, S.; Friedli, T.; Badstuebner, U. (ETH Zurich, Power Electronic Systems Laboratory, Switzerland)
In 2003 the Roadmapping Initiative of the European Center of Power Electronics (ECPE) has been started based on a future vision of society in 2020 in order to define the future role of power electronics, and to identify technological barriers and prepare new technologies well in time. In the framework of this initiative a new mathematically supported approach for the roadmapping in power electronics has been developed. As described in this paper the procedure relies on a comprehensive mathematical modeling and subsequent multi-objective optimization of a converter system. The relationship between the technological base and the performance of the system then exists as a mathematical representation, whose optimization assures the best possible exploitation of the available degrees of freedom and technologies. Thus an objective Technology Node of a system is obtained, whereby physical limits are implicitly taken into account. Furthermore, the sensitivity of the system performance with regard to the technological base can be calculated directly and the internal interdependence of Performance Indices directly studied. Accordingly, the improvement in performance achievable by improvements in the technology base can be tested and assessed in advance. Moreover, different system concepts, i.e. circuit topologies, control procedures, etc. can be evaluated and directly compared with regard to achievable efficiency, power density and costs in the form of the associated Pareto Front which defines the boundary of the Feasible Performance Space. If the target performance lies outside the Pareto Envelope of known system concepts and state-of-the-art technologies, a new technology must be employed. The necessity of a technological leap, i.e. the introduction of a Disruptive Technology can thus be recognized at an early stage. This offers an excellent basis for effective roadmapping for various main application areas in power electronics.