A Holistic Approach of an Architecture for Tests of FPGA Based Systems with Boundary Scan
Konferenz: Zuverlässigkeit und Entwurf - 4. GMM/GI/ITG-Fachtagung
13.09.2010 - 15.09.2010 in Wildbad Kreuth, Germany
Tagungsband: Zuverlässigkeit und Entwurf
Seiten: 2Sprache: EnglischTyp: PDF
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Autoren:
Sachße, Jörg; Ostendorff, Steffen; Wuttke, Heinz-Dietrich; Meza Escobar, Jorge Hernán (Technische Universität Ilmenau, FG Integrierte Kommunikationssysteme, PF 10 05 65, 98684 Ilmenau, Germany)
Inhalt:
This paper describes an approach of boundary scan emulation based testing for failure diagnostics using programmable logic available on-board. The motivation to speed up boundary scan based testing as well as the approach for this new concept is presented. With this approach boundary scan testing can be extended and fastened. The new options and benefits, as well as the necessary fundamentals are indicated.