High-Speed and Low-Power Static Frequency Divider and Decision Circuit with 0.5-?m-emitter-width InP HBTs

Konferenz: IPRM 2011 - 23th International Conference on Indium Phosphide and Related Materials
22.05.2011 - 26.05.2011 in Berlin, Germany

Tagungsband: IPRM 2011

Seiten: 4Sprache: EnglischTyp: PDF

Persönliche VDE-Mitglieder erhalten auf diesen Artikel 10% Rabatt

Autoren:
Bouvier, Y.; Nagatani, M.; Sano, K.; Murata, K.; Kurishima, K.; Ida, M. (NTT Photonics Laboratories, NTT Corporation, 3-1 Morinosato Wakamiya, Atsugi-shi, Kanagawa, Japan)

Inhalt:
A static frequency divider and decision circuit have been designed and fabricated in a 290-GHz-fT InP HBT technology. The static frequency divider operates up to 70 GHz with core power consumption as low as 19.6 mW. The decision circuit, realized with a parallel-clock structure, achieves error-free operation up to 50 Gbps with power consumption of 142 mW. Both speed/power ratios are among the highest in over-50-GHz applications. These results demonstrate the suitability of this technology for high-speed and low-power applications.