Planar Interconnect Technology for Power Module System Integration
Konferenz: CIPS 2012 - 7th International Conference on Integrated Power Electronics Systems
06.03.2012 - 08.03.2012 in Nuremberg, Germany
Tagungsband: CIPS 2012
Seiten: 5Sprache: EnglischTyp: PDFPersönliche VDE-Mitglieder erhalten auf diesen Artikel 10% Rabatt
Weidner, K.; Kaspar, M. (Siemens AG, Corporate Technology, 81739 Munich, Germany)
Seliger, N. (University of Applied Sciences Rosenheim, 83024 Rosenheim, Germany)
The recent developments in power semiconductor devices and increasing demands on reliability as well as on operation performance require innovative package technologies. Such a novel package technique based on a Planar Interconnect Technology (SiPLIT(r)) for power modules is introduced in this work. This package features thick Cu interconnects on a high-reliable insulating film for power semiconductor chip top contacts. Due to the conductor structure and contact technology, on-resistance and stray inductances are very low compared to state-of-the-art Al wire bonds. In addition, large area contacting improves the power cycling capability and surge current robustness significantly. These remarkable properties have been verified on several prototype modules where the manufacturing process has also been optimised in terms of cost-effectiveness, system integration and maturity for series production.