Mixed-Signal and Smart-Power Capable Hybrid Structured ASIC for Cost-Aware Single-Chip Integration of Industrial Applications
Konferenz: CIPS 2012 - 7th International Conference on Integrated Power Electronics Systems
06.03.2012 - 08.03.2012 in Nuremberg, Germany
Tagungsband: CIPS 2012
Seiten: 4Sprache: EnglischTyp: PDFPersönliche VDE-Mitglieder erhalten auf diesen Artikel 10% Rabatt
Zhang, Yipin; Scherjon, Cor; Burghartz, Joachim N. (Institute for Microelectronics Stuttgart (IMS-CHIPS), 70569 Stuttgart, Germany)
A new single-chip integration approach for industrial applications based on novel mixed-signal and smart-power capable hybrid structured ASIC is presented. The hybrid structured ASIC, offering low non-recurring engineering (NRE) costs of low-voltage (LV) structured ASICs as well as power electronic functionalities of cell based smart-power ICs, provides a cost-efficient integration platform for industrial applications. Based on the demonstrator chip fabricated in a 0.8micrometer high-voltage (HV) bipolar, CMOS, DMOS (BCD) silicon on insulator (SOI) process, construction of the hybrid structured ASIC is illustrated in detail and the applicability of the platform is successfully demonstrated.