Extending Microprocessor Trace Hardware for Fault Injection

Konferenz: ZuE 2015 - 8. GMM/ITG/GI-Fachtagung Zuverlässigkeit und Entwurf – Reliability by Design
21.09.2015 - 23.09.2015 in Siegen, Deutschland

Tagungsband: GMM-Fb. 83: ZuE 2015

Seiten: 8Sprache: EnglischTyp: PDF

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Gunia, Marco; Zabel, Martin; Spallek, Rainer G. (Professorship for VLSI Design, Diagnostic and Architecture, Technische Universität Dresden, 01062 Dresden, Germany)

This paper proposes a novel concept for fault injection based on the trace interface, which is originally intended for software debugging. Initially, an introduction to fault injection is presented. Following the illustration of the underlying infrastructure, requirements for the integration of fault injection are developed leading to the selection of instrumentation-based techniques. On this basis, this document details the implementation of a technique on register transfer level, supporting five fault models. Controllability and observability of faults are specified.