Switch Bootstrapping in a 1.5 Bit Pipeline Stage

Konferenz: ANALOG 2016 - 15. ITG/GMM-Fachtagung
12.09.2016 - 14.09.2016 in Bremen, Germany

Tagungsband: ITG-Fb. 266: Analog 2016

Seiten: 4Sprache: EnglischTyp: PDF

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Loehr, Robert; Ohnhaeuser, Frank; Roeber, Juergen; Weigel, Robert (Institute for Electronics Engineering, Friedrich-Alexander University Erlangen-Nuremberg, Erlangen, Germany)

The targeted 16 bit pipeline converter has an adjustable sampling frequency from 100 MHz to 200 MHz. In this paper the switches for the input and the reference voltage sampling are analyzed. Therefore, a novel switch bootstrapping technique is presented, which guarantees a worst case input voltage settling accuracy of LSB 2 at settling times between 2 ns to 5 ns. The non-linearity caused by the input switches is simulated and typically amounts to -115 dB. In addition a possible solution for external reference voltage settling is introduced.