ESD damage without failure, followed by EOS: A case study on automotive smart power ICs

Konferenz: Zuverlässigkeit und Entwurf - 9. ITG/GMM/GI-Fachtagung
18.09.2017 - 20.09.2017 in Cottbus, Deutschland

Tagungsband: Zuverlässigkeit und Entwurf

Seiten: 6Sprache: DeutschTyp: PDF

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Autoren:
Helmut, Dennis (University of the Federal Armed Forces Munich, Werner-Heisenberg-Weg 39, 85577 Neubiberg, Germany & Chair for Physics of Electrotechnology, Technical University of Munich, Munich, Germany)
Wachutka, Gerhard (Chair for Physics of Electrotechnology, Technical University of Munich, Munich, Germany)
Groos, Gerhard (University of the Federal Armed Forces Munich, Werner-Heisenberg-Weg 39, 85577 Neubiberg, Germany)

Inhalt:
There is a long term open issue, whether some Electrostatic Discharge (ESD) damage could only reduce the robustness of a device, but still allow normal operation. In this way, a corresponding later destruction would possibly be attributed to electrical overstress (EOS), but had its root cause in the prior ESD event. To investigate this scenario of "latent damage", commonly used automotive CAN transceiver ICs are stressed by transmission line pulsing (TLP). Afterwards, the IC’s communication ability is tested. Our analysis shows that in a wide range of stress conditions the ICs’ outputs clearly violate their device specifications, but the ICs still communicate without any interference on system level. Furthermore, we emulated "EOS during normal operation" by subsequent TLP pulses applying voltages inside the absolute maximum ratings (AMR). By this kind of "step-by-step" EOS the damage could be increased until the communication failed. Finally, the I-V-characteristic reveals that those voltages, well below the AMR, would lead to catastrophic EOS if the source was powerful enough. Thus our work shows that pulsed stress can generate damages that might stay unnoticed during normal operation, but nevertheless enable catastrophic destruction well inside the specified AMR. Similar pulses can occur in the field, e.g. caused by discharges of charged cables, so that the stress presented here is a possible scenario of latent failure.