A side-wall spacer process for releasing and sealing of post-CMOS MEMS pressure sensor membranes

Inhalt:
In this work a sub-step of the fabrication of an absolute capacitive pressure sensor MEMS on top of a CMOS substrate is discussed. For low pressure applications membrane diameters of more than 100 µm are required. To apply an isotropic HF-vapour phase etching process for successful release of MEMS structures, an access to the sacrificial layer is required. Since vapour phase etching of a sacrificial layer by side openings is shown to be inappropriate due to the addressed diameters, vertically arranged openings in the structural layer of the MEMS-structure have been utilised. Different designs of possible etch accesses are simulated regarding their impact on stress. It is shown that a diameter minimisation of vertical etch-access tunnels is beneficial with respect to stress (under an applied pressure of 1500 hPa) and regarding the conditions for sealing the cavity. Therefore, a side-wall spacer process, which minimises the diameters of vertical etch-access tunnels was developed and discussed. By the use of two applied hardmasks the diameter of lithographically structured tunnels is reduced by about 260 nm (40%).